The present invention relates to a semiconductor apparatus and, for example, to a semiconductor apparatus including a driving circuit for driving a power MOS transistor and a protection circuit for protecting the power MOS transistor.
Recently, power MOS transistors have been increasingly used as switches for switching whether or not power is supplied to circuits. A switch IC using such a power MOS transistor needs a driving circuit for driving a MOS transistor, and a protection circuit for overheat protection of the MOS transistor, load short-circuit protection, and the like. Thus, Japanese Unexamined Patent Application Publication No. 2007-89239 discloses an example of a short-circuit protection circuit for protecting a MOS transistor when a load driven by the MOS transistor is short-circuited.
Japanese Unexamined Patent Application Publication No. 2007-89239 discloses a timer latch short-circuit protection circuit. This timer latch short-circuit protection circuit is composed of a detection circuit, a delay circuit, and a latch circuit. The delay circuit is reset by an output voltage abnormal signal of a switching regulator output by the latch circuit, and the latch circuit is reset by a sum of the output voltage abnormal signal and an UVLO signal.